An Application Mapping Technique for Butterfly-Fat-Tree Network-on-Chip

Abstract

This paper presents a novel application mapping strategy onto the Butterfly Fat Tree (BFT) topology for Network-on-Chip (NoC) design. It proposes a Kernighan-Lin bi-partitioning strategy to identify the closeness of cores by analyzing their bandwidth requirements. The nodes are then mapped to the BFT topology. The BFT mapping results have been compared with mesh-mapping results reported in the literature for some benchmark applications. Experimentation with established benchmarks shows that there is 30-35% improvement in communication cost while considering static communication between the cores to the best ones previously available. The dynamic performance (including latency and throughput) of this strategy is comparable with previously available mapping strategies.