2002 · 12 citations · 2 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureParallel ComputingReconfigurable ComputingField-programmable Gate Array ArchitectureInstruction Set ArchitectureMemory Subsystem DesignParallel ArchitecturesParallel Computer ArchitectureProcessor MicroarchitectureArithmetic Logic Unit ArchitectureCommunication PrimitivesReal-time ProcessingReconfigurable Array ArchitectureSimd ArchitecturesSimd ParallelismSystem-level Design Space ExplorationVlsi Implementation
Describes the Abacus machine at a number of levels. Presents the microarchitecture of the PE comprising the reconfigurable bit-parallel array, a set of arithmetic and communication primitives, details of the VLSI implementation, and system-level design issues of a high-speed SIMD array. The most concrete goal of the Abacus project was to design and build a machine that could be used by members of the MIT Artificial Intelligence Laboratory for real-time early vision processing. Along the way, we explored several architectural ideas.
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André DeHon, Thomas F. Knight, Tyler A. Simon · 1993 · 47 citations
Engineering, Computer Engineering, Electrical Engineering +16
The geometric arithmetic parallel processor
Eugene L. Cloud · 2003 · 31 citations