IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1992 · 12 citations · 22 references
EngineeringField RoboticsGeometry GenerationComputer-aided DesignMicroactuatorComputational MechanicsMesh OptimizationBio-inspired RoboticsKinematicsComputational GeometryGeometric ModelingEnergy HarvestingMechatronicsComputer EngineeringActuationAutomatic Jog GenerationAutomatic JogsNew AlgorithmGeometric AlgorithmEfficient Cell CompactorNatural SciencesMechanical Systems
To develop an efficient cell compactor for practical use, the authors take the one-dimensional compaction approach, but with a mixed symbolic and shape data model. A new algorithm of automatic jog generation is employed to create jogs, not only on critical paths but also on some noncritical paths. An optimum wire length minimization algorithm is used to tighten wires and polygon edges. These algorithms help reduce both the cell size and the parasitic, and hence produce high-quality layouts. The compactor has been used at IBM in the production of several standard cell libraries and macrocells,.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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D.N. Deutsch · 1976 · 397 citations
Wireless Communications, Physical Design (Electronics), Engineering +15
Symbolic layout and compaction of integrated circuits
M. Y. Hsueh · PhDT · 1980 · 104 citations
Physical Design (Electronics), Engineering, Circuit Design +6