Cell Library Design
Cell Library Design is a foundational methodology in Very-Large-Scale Integration layout that constitutes the systematic development of a standardized, parameterized set of reusable digital circuit elements, distinguished by its focus on optimizing functionality, area, timing, and power characteristics for scalable and efficient integrated circuit synthesis.
249
Publications
9.2K
Citations
858
Authors
223
Institutions
Publications per year
2017–2026
38
Variants
Standard Cell Library Design
249
Top-down pass-transistor logic design
Kazuo Yano, Y. Sasaki, K. Rikino et al. · IEEE Journal of Solid-State Circuits · 1996 · 258 citations
Engineering, Computer Engineering, Electrical Engineering +17
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223

Yokohama National University
Yokohama, Japan
12 h-index
42 publications
1.9K citations
IMEC
Leuven, Belgium
10 h-index
79 publications
1.7K citations

National Yang Ming Chiao Tung University
Hsinchu, Taiwan
9 h-index
24 publications
925 citations
National Tsing Hua University
Hsinchu, Taiwan
8 h-index
23 publications
598 citations
Nagoya University
Nagoya, Japan
8 h-index
26 publications
1K citations

Kyoto University
Kyoto, Japan
6 h-index
12 publications
217 citations
The University of Texas at Austin
Austin, United States
6 h-index
10 publications
424 citations
Synopsys (United States)
Mountain View, United States
6 h-index
16 publications
811 citations
1–8 of 223
13 publications · 1.9K citations
13
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12 publications · 326 citations
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10 publications · 313 citations
10
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10 publications · 297 citations
10
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7 publications · 169 citations
7
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