Top-down pass-transistor logic design

TLDR

Pass‑transistor logic offers a multiplexer‑like, open‑drain cell that is flexible at the transistor level and compatible with conventional cell designs, and the LEAP scheme builds on this concept. The study constructs a pass‑transistor cell library and synthesis tool to demonstrate the potential of top‑down pass‑transistor logic. The authors built a seven‑cell pass‑transistor library with the “circuit inventor” synthesis tool and compared its performance to a conventional CMOS library of over 60 cells and state‑of‑the‑art logic synthesis, while addressing key issues for replacing CMOS. LEAP reduces area, delay, and power consumption while improving the value‑cost ratio by a factor of three, indicating a potential quantum leap in LSI value at lower cost.

Abstract

The pass-transistor based cell library and synthesis tool are constructed, for the first time, to clarify the potential of top-down pass-transistor logic. The entire scheme is called LEAP (Lean Integration with Pass-Transistors). The feature of a pass-transistor based cell is its multiplexer function and the open-drain structure. This cell has the flexibility of transistor level circuit design and compatibility with conventional cell based design. An extremely simple cell library with only seven cells combined with a synthesis tool called "circuit inventor" is compared with the conventional CMOS library that has over 60 cells combined with the state-of-the-art logic synthesis. The results show that the area, delay, and power dissipation are improved by LEAP and that the value-cost ratio is improved by a factor of three. This demonstrates that LEAP has the potential to achieve a quantum leap in value of LSI's while reducing the cost. Key issues which have to be cleared before pass transistor logic is used as the generic logic scheme replacing CMOS are also discussed.