2002 · 28 citations · 0 references
EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesThin FilmsDevice ModelingDevice ScalingIntegrated Circuit DesignSemiconductor Thin FilmsShort-channel EffectsThin-film TransistorsFilm ThicknessFully Depleted Silicon-on-insulator ScalingFully Depleted Silicon-on-insulator TransistorsScaling Effects In CmosShort-channel Scaling TheorySiliconSilicon-on-insulator Technology
Thin-film, fully-depleted silicon-on-insulator (SOI) MOSFETs are currently of great interest due to potentially improved isolation, reduced subthreshold slope, and reduced parasitic capacitances as compared to bulk silicon technology. In addition, for scaling devices into the deep-submicrometer region, SOI offers unique options for the reduction of short-channel effects. Previous work has shown that scaling silicon film thickness and buried oxide thickness are important in the reduction of SOI short-channel effects. However, to fully exploit these options in SOI, a careful examination of the design tradeoffs is necessary. In this paper, short-channel effects in SOI are examined in comparison to conventional bulk devices for scaling into the deep-submicrometer region.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>