2002 · 67 citations · 5 references
EngineeringElectrical EngineeringElectronic MaterialsMicroelectronicsSemiconductor DevicesCmos Circuit DesignDevice ModelingEtching ProcessesHigh-frequency Semiconductor DevicesIntegrated Circuit DesignIntegrated Circuit FabricationCmos Fabrication ProcessesHigh-frequency OperationInductorsParasitic Capacitance ReductionPost-processingSiliconSilicon EtchingSilicon Microwave Integrated Circuits
This paper considers the fabrication and modelling of suspended membrane inductors and capacitors on ordinary silicon substrates. A single post-processing etching step was added to an otherwise standard process. For both components, parasitic capacitances to ground are drastically reduced, enabling high frequency operation. Furthermore, the measured quality factor Q is demonstrably improved with respect to normally fabricated thin film components.
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Modelling of passive elements for coplanar SiGe MMIC's
Ralf Doerner, John Gerdes, C. Rheinfelder et al. · 2002 · 19 citations