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Two step Deposited Rugged Surface (TDRS) Storagenode and Self Aligned Bitline-Contact-Penetrating Cellplate (SABPEC) for 64MbDRAM STC Cell

DOI

11

Citations

2

References

1991

Year

Hidenori Itob, Y. Miyagawa, Masaru Takahashi, T. Mitsuhashi, Yukifumi Kimura, Akira Endoh, Y. Nagatomo, Masaki Yoshimaru, F. Ichikawa, M. Ino

Unknown Venue

Abstract

In this paper, the 1.5mum2 STC is reported with Two step Deposited Rugged Surface Poly-Si (TDRS) enabling fin shape storagenode and also with a Self-Aligned Bitline-contact by PEnetrating Cellplate (SABPEC) to increase projective storagenode area, reducing pattern tolerance.

References

YearCitations

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