A framework for system reliability analysis considering both system error tolerance and component test quality

Abstract

The failure rate, the sources of failures and the test costs for nanometer devices are all increasing. Therefore, to cre-ate a reliable system-on-a-chip device requires designers to implement fault tolerance. However, while system-level fault tolerance could significantly relax the quality requirements of the system’s building blocks, every fault-tolerant scheme only works under certain failure mechanisms and within a certain range of error probabilities. Also, designing a system with a high failure-rate component could be very expensive because the growth rate of the design complexity and the system over-head for fault tolerance could be significantly greater than the component failure rate. Therefore, it is desirable to un-derstand the trade-offs between component test quality and system fault-tolerant capability for achieving the desired re-liability under cost constraints. In this paper, we propose an analysis framework for system reliability considering (a) the test quality achieved by manufacturing testing, on-line self-checking, and off-line built-in self-test; (b) the fault-tolerant and spare schemes; and (c) the component defect and er-ror probabilities. We demonstrate that, through proper re-dundancy configurations and low-cost testing to insure a cer-tain degree of component test quality, a low-redundant sys-tem might achieve equal or higher reliability than a high-redundant system. 1