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Design and fabrication of 50-nm thin-body p-MOSFETs with a SiGe heterostructure channel
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Citations
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References
2002
Year
Electrical EngineeringSemiconductor DeviceThin-body Mos TransistorEngineeringRf SemiconductorNanoelectronicsElectronic EngineeringApplied Physics50-Nm Thin-body P-mosfetsSemiconductor Device FabricationSelective Silicon ImplantMicroelectronicsOptoelectronicsSige/si Heterostructure ChannelSilicon On InsulatorSige Heterostructure Channel
Thin-body p-channel MOS transistors with a SiGe/Si heterostructure channel were fabricated on silicon-on-insulator (SOI) substrates. A novel lateral solid-phase epitaxy process was employed to form the thin-body for the suppression of short-channel effects. A selective silicon implant that breaks up the interfacial oxide was shown to facilitate unilateral crystallization to form a single crystalline channel. Negligible threshold voltage roll-off was observed down to a gate length of 50 nm. The incorporation of Si/sub 0.7/Ge/sub 0.3/ in the channel resulted in a 70% enhancement in the drive current. This is the smallest SiGe heterostructure-channel MOS transistor reported to date. This is also the first demonstration of a thin-body MOS transistor incorporating a SiGe heterostructure channel.
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