2002 · 182 citations · 13 references
EngineeringComputer EngineeringElectrical EngineeringCircuit TheoryMicroelectronicsSemiconductor DevicesBuilt-in Self-testCmos Circuit DesignDesign For TestabilityFault DetectionFault DiagnosisFault ModelingCircuit Fault AnalysisCmos ReliabilityFault AnalysisFault Detection ModelsHardware Fault DetectionHardware Fault Models
Traditional fault models for testing CMOS VLSI circuits do not take into account the actual mechanisms that precipitate faults in CMOS circuits. As a result, tests based on traditional fault models may not detect all the faults that occur in the circuit. This paper discusses the Carafe software package which determines which faults are likely to occur in a circuit based on the circuit's physical design, defect parameters, and fabrication technology.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
13
Defect Level as a Function of Fault Coverage
Williams, Brown · IEEE Transactions on Computers · 1981 · 348 citations
Engineering, Computer Engineering, Electrical Engineering +17