MPTG: a portable test generator for cache-coherent multiprocessors

Abstract

Cache-coherent multiprocessors are typically verified by extensive simulation with randomly generated testcases. With this methodology, certain aspects of test coverage can be measured using monitors that record the occurrence of specific events during simulation. If certain events do not occur sufficiently often, the designer must somehow bias the random test generator or write hand-written testcases to improve coverage of the desired event. This is usually a labor-intensive process that is made worse by frequent changes in design specifications and the high cost of simulating large multiprocessor models. This paper describes MPTG (MultiProcessor Test Generator): a portable test generator that automates much of this labor-intensive component of the simulation process. MPTG does this by deterministically generating sets of testcases that are guaranteed to cause specific events to happen. For example, with a single, compact test specification it is possible to generate a set of tests that exercise all transaction types and current cache state combinations at a particular cache in the system. Alternatively, it is easy to generate a set of tests that exercise all two-way races that can occur at a particular cache. Test generation at this level of detail requires the incorporation of a system-wide coherence protocol within the test generator, which can make it difficult to port the test generator to different systems. Portability is achieved in MPTG by breaking the test generator into two parts: a generic test generation engine and a system-specific set of protocol tables.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>