2013 · 53 citations · 44 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureParallel ComputingStorage SystemsCachingInstruction Set ArchitectureInstruction-level ParallelismMemory Hierarchy DesignMemory Hierarchy OptimizationSpeculative ExecutionCache Hit Rate OptimizationCache Miss AnalysisCache PrefetchingMany-core ProcessorsMemory Hierarchy AnalysisPrefetchingPrefetching MechanismsPrefetching Strategies
In server workloads, large instruction working sets result in high L1 instruction cache miss rates. Fast access requirements preclude large instruction caches that can accommodate the deep software stacks prevalent in server applications. Prefetching has been a promising approach to mitigate instruction-fetch stalls by relying on recurring instruction streams of server workloads to predict future instruction misses. By recording and replaying instruction streams from dedicated storage next to each core, stream-based prefetchers have been shown to overcome instruction fetch stalls. Problematically, existing stream-based prefetchers incur high history storage costs resulting from large instruction working sets and complex control flow inherent in server workloads. The high storage requirements of these prefetchers prohibit their use in emerging lean-core server processors.
44
Michael Ferdman, Almutaz Adileh, Onur Kocberber et al. · 2012 · 814 citations
Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow
Wilson Wai Lun Fung, Ivan Sham, George L. Yuan et al. · 2007 · 727 citations
Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi et al. · 2003 · 513 citations
SimFlex: Statistical Sampling of Computer System Simulation
Thomas F. Wenisch, Roland E. Wunderlich, Michael Ferdman et al. · IEEE Micro · 2006 · 334 citations · Full text