IEEE Journal of Solid-State Circuits · 2008 · 34 citations · 11 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsSemiconductor DevicesAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated CircuitsMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsWide-bandgap Semiconductor DevicesAnalog-digital ConversionAnalog-to-digital ConversionAnalog-to-digital Converter DesignAnalog-to-digital ConvertersHeterojunction Bipolar TransistorsIndium PhosphideInterconnect FabricationMonolithic Architecture
An ultra-wideband 7-bit 5-Gsps analog-to-digital converter (ADC), fabricated in a 4-level interconnect, 0.8 mum Indium-Phosphide (InP) heterojunction bipolar transistor (HBT) technology, is presented. This monolithic folding/interpolating ADC includes a front-end master-slave sample and hold and a pipeline stage sample and hold. The chip achieves 6 effective number of bits (ENoB) Nyquist performance at a sample rate of 5 Gsps, while dissipating 8.4 W. Furthermore, an ENoB performance of greater than 5.7 is maintained at analog input frequencies up to 7.5 GHz. This effective resolution-bandwidth product performance is significantly higher than any other previously reported monolithic ADC with sample rate ges 3 Gsps.
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A 20 GS/s 8 b ADC with a 1 MB memory in 0.18 μm CMOS
K. Poulton, R. Neff, B. Setterberg et al. · 2003 · 140 citations
A 6 b 1.3 GSample/s A/D converter in 0.35 μm CMOS
Michael Choi, A.A. Abidi · 2002 · 104 citations