2003 · 140 citations · 2 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsAnalog Integrated CircuitsAnalog IntegrationCmos Circuit DesignLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignMixed-signal IntegrationAnalog-to-digital Converter DesignBicmos TechnologyCmos Analog Circuit DesignCmos Analog Integrated CircuitsLow-power Memory ArchitectureMemory Circuit DesignOn-chip Memory DesignPower Consumption
A 20 GS/s 8-bit ADC achieves a bandwidth of 6 GHz in 0.18 /spl mu/m CMOS. The implementation uses 80 time-interleaved current-mode pipeline sub-ADCs and stores data at 20 GB/s into a 1 MB on-chip memory. The ADC is packaged with a BiCMOS input buffer chip in a 438-ball BGA, and total power consumption is 10 W.
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