A channel resistance derivative method for effective channel length extraction in LDD MOSFETs

Abstract

A channel resistance derivative method for extracting the electrical effective channel length and series resistance is proposed, and demonstrated on an advanced 0.35 /spl mu/m LDD CMOS technology. A clear graphic image of the L/sub EFF/ and R/sub SD/ is obtained directly from the measured channel resistance and its derivative with respect to the gate bias. The method also provides guidelines for the proper gate bias range selection in traditional L/sub EFF/ extraction techniques.