A Delta–Sigma Interface Circuit for Capacitive Sensors With an Automatically Calibrated Zero Point

Abstract

We present a low-complexity interface circuit for capacitive sensors that are integrated into sensor microsystems. To reduce hardware cost while keeping high resolution, a first-order delta-sigma modulator (DSM), which balances the charge from the capacitive difference between sense and reference capacitors with the charge from a fixed-quantity capacitor, is employed. A charge-mode digital-to-analog converter and a successive approximation register are utilized to automatically calibrate the zero point of the interface circuit, which may shift further than a dynamic range. A prototype circuit fabricated in a 0.35-μm CMOS process has an active area of 0.048 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Its DSM operates at a sampling frequency of 1 MS/s with an oversampling ratio of 128. Experiments show that this circuit can read a capacitive difference from -0.5 to +0.5 pF with a 0.49-fF resolution. A capacitive offset that causes the zero point to shift can be canceled in the range from -2 to 2 pF with a 31.25-fF resolution. Measured power consumption was 1.44 mW at a 3.3-V supply.