1989 · 44 citations · 7 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureLow-power DesignReconfigurable ComputingCircuit ComplexityCombinational Logic DescriptionConfigurable Logic BlocksDigital Logic DesignFpga ArchitectureLookup TablesArea-efficient Logic Block DesignCombinational Logic DesignConfigurable Logic Block DesignFlip-flop DesignLogic Block DecompositionLogic Block DesignLogic Block Placement StrategiesTechnology Mapping To Logic Blocks
The authors explore the tradeoff between the area of a programmable gate array (PGA) and the functionality of its logic block. A set of industrial circuits is implemented as PGAs using tools for technology mapping, placement, and routing. A simple model allows the exploration of a range of programming technologies and accounts for the area required by wiring. Experiments indicate that for combinational logic blocks implemented using lookup tables, the best number of inputs to use is between three and four, and that a D flip-flop should always be included in the logic block. These results are independent of the programming technology
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A 9000-gate user-programmable gate array
Harry Hsieh, Khoi P. Dong, J.Y. Ja et al. · 2003 · 44 citations
Engineering, Computer Engineering, Electrical Engineering +12
A CMOS electrically configurable gate array
Khaled El-Ayat, Abbas El Gamal, R. Guo et al. · IEEE Journal of Solid-State Circuits · 1989 · 42 citations
Engineering, Computer Engineering, Electrical Engineering +9