IEEE Journal of Solid-State Circuits · 1989 · 42 citations · 7 references
EngineeringComputer EngineeringElectrical EngineeringField-programmable Gate ArraysMicroelectronicsSemiconductor DevicesCmos Circuit DesignIntegrated Circuit DesignIntegrated Circuit FabricationCmos Logic CircuitsGate Array DesignProgrammable Interconnect Architecture
A CMOS electrically configurable gate array that combines the flexibility, efficiency, extendability, and performance of mask-programmed gate arrays with the convenience of user programmability is described. The implementation is facilitated by a novel two-terminal antifuse programmable element and a configurable interconnect technology. The chip has been fabricated using 2- mu m n-well CMOS technology with two-layer metallization.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Dielectric based antifuse for logic and memory ICs
E. Hamdy, John McCollum, S.-O. Chen et al. · 2003 · 87 citations
Engineering, Computer Engineering, Electrical Engineering +8
A 9ns Electrically Erasable Cmos Programmable Logic Device
Darling, Josephson, Rutledge · 1988 · 54 citations
Engineering, Computer Engineering, Electrical Engineering +10
A 9000-gate user-programmable gate array
Harry Hsieh, Khoi P. Dong, J.Y. Ja et al. · 2003 · 44 citations
Engineering, Computer Engineering, Electrical Engineering +12
An architecture for electrically configurable gate arrays
Abbas El Gamal, Jonathan Greene, J. Reyneri et al. · 2003 · 31 citations
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