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Fabrication of integrated injection logic with electron-beam lithography and ion implantation
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Citations
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References
1978
Year
EngineeringElectron-beam LithographyIntegrated Injection LogicIntegrated CircuitsSemiconductor DeviceIon ImplantationWafer Scale ProcessingHigh-speed ElectronicsSemiconductor InterfacesAdvanced Packaging (Semiconductors)NanoelectronicsBeam LithographyElectronic PackagingElectrical EngineeringSemiconductor Device FabricationMicroelectronicsMicrofabricationApplied PhysicsInjection Logic GatesDelay Time
Integrated injection logic gates have been fabricated using electron-beam lithography and ion implantation. A factor of five reduction in gate area over conventional designs was achieved by using minimum linewidths of 1.25 µm. Average propagation delay of 6 ns at 100 µA/gate injector current and speed-power product of 0.13 pJ at 5 µA have been measured on five collector, stick geometry, n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> guard ring device structures. The delay time is a factor of three and the speed-power product is a factor of five better than typical conventionally sized structures fabricated with photolithography. A minimum delay of 3.6 ns has been achieved on five collector device structures designed for maximum speed.
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