A Metric for Automatic Word-Length Determination of Hardware Datapaths

Abstract

A metric for the automatic determination of word lengths required for implementing DSP algorithms is proposed. The metric is capable of handling several error models computed between the fixed-point and the floating-point simulation results to model the impact of finite word lengths on the overall accuracy. It grades all the word-length combinations and guides a procedure towards the optimal solution. This metric was implemented in an automatic word-length determination tool to guide its search for better hardware implementations. It enables the creation of a framework for architecture and platform exploration.