A methodology and design environment for DSP ASIC fixed point refinement

Radim Cmar, L. Rijnders, Patrick Schaumont, Serge Vernalde, I. Bolsens

1999 · 113 citations · 4 references

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Abstract

Complex signal processing algorithms are specified in floating point precision. When their hardware implementation requires fixed point precision, type refinement is needed. The paper presents a methodology and design environment for this quantization process.

References

4