Hardware Performance Modeling
Hardware Performance Modeling is a formal methodology that belongs to the class of hardware modeling techniques, differing in its specific focus on quantitatively predicting and analyzing the operational efficiency and resource utilization of digital systems under defined workloads and architectural constraints.
431
Publications
30.3K
Citations
1.4K
Authors
362
Institutions
Publications per year
2017–2026
73
431
Networks on chips: a new SoC paradigm
Luca Benini, Giovanni De Micheli · Computer · 2002 · 3.7K citations · Full text
Computer architecture: a quantitative approach
Martin Shute · Microelectronics Journal · 1993 · 3.4K citations
Samuel Williams, Andrew Waterman, David A. Patterson · Communications of the ACM · 2009 · 2.4K citations · Full text
SimpleScalar: an infrastructure for computer system modeling
T. Austin, Eric D. Larson, Daniel Ernst · Computer · 2002 · 1.6K citations
1–5 of 431
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362
Carnegie Mellon University
Pittsburgh, United States
16 h-index
53 publications
1.9K citations
Intel (United States)
Santa Clara, United States
12 h-index
37 publications
4.7K citations
University of California, Berkeley
Berkeley, United States
12 h-index
23 publications
5.6K citations
Stanford University
Stanford, United States
11 h-index
43 publications
7K citations
IBM (United States)
Armonk, United States
11 h-index
25 publications
806 citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
10 h-index
30 publications
800 citations

Cornell University
Ithaca, United States
9 h-index
20 publications
1.7K citations
The University of Texas at Austin
Austin, United States
9 h-index
31 publications
1.1K citations
1–8 of 362
13 publications · 787 citations
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9 publications · 5.9K citations
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7 publications · 244 citations
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6 publications · 318 citations
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5 publications · 160 citations
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