A Highly Scalable High Voltage MOSFET Model

Abstract

The authors propose a new highly scalable general high voltage MOSFET model for circuit simulation. A new general drift resistance model for the drift part is proposed while intrinsic MOS channel is modeled using low voltage EKV MOS model. The proposed general model is highly scalable for major physical and electrical parameters. It is shown that the model performs excellently over a wide range of DC bias condition along with the scalability against transistor width; drift length, number of fingers and temperature. The model shows good behavior for all capacitances which are unique for these devices showing peaks and shift of peaks with bias variation. The model is validated on the measured characteristics of LDMOS and VDMOS devices