Built-in self-test in a 24 bit floating point digital signal processor

Abstract

The authors describe a built-in self-test (BIST) method implemented in a 24-b floating-point digital signal processor (DSP) using pseudorandom patterns. By use of only one pair- of LFSRs (linear feedback shift registers) and 253 words of normal instruction, 95% of the functional blocks are self-tested. The number of the test vectors is 35 million. However, the entire BIST takes only 2.6 s for the test, owing to the fast machine cycle time of 75 ns. The overhead of the test hardware is only 2.0% of the die size. The evaluation results show that a BIST is very useful for computationally intensive VLSI processors, such as a DSP.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>