A 16-Mb MRAM featuring bootstrapped write drivers

D. Gogl, Christine Arndt, J.C. Barwin, Ann-Christin Bette, J. DeBrosse, E. Gow, H. Hoenigschmid, S. Lammers, M. Lamorey, Yu Lu,

IEEE Journal of Solid-State Circuits · 2005 · 48 citations · 4 references

Concepts

Abstract

A 16-Mb magnetic random access memory (MRAM) is demonstrated in 0.18-/spl mu/m three-Cu-level CMOS with a three-level MRAM process adder. The chip, the highest density MRAM reported to date, utilizes a 1.42/spl mu/m/sup 2/ 1-transistor 1-magnetic tunnel junction (1T1MTJ) cell, measures 79 mm/sup 2/ and features a /spl times/16 asynchronous SRAM-like interface. The paper describes the cell, architecture, and circuit techniques unique to multi-Mb MRAM design, including a novel bootstrapped write driver circuit. Hardware results are presented.

References

4