Multi-Level Operation of Fully CMOS Compatible WOX Resistive Random Access Memory (RRAM)

Abstract

The multi-level operation of WO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> based RRAM has been investigated. Improvement of our WO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> process has produced an extended linear R-V region for our devices. By adding an electrical forming process and a program-verify algorithm we have demonstrated stable 2-bit/cell operation, with potential for 3-bit/cell. The reliability of the MLC operation has been examined and very stable high temperature retention, robust read disturb immunity and initial cycling endurance of >1,000 times have been demonstrated.