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Optimized MOSFETs with subquartermicron channel lengths

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1983

Year

Abstract

We present new experimental results on optimally scaled MOSFETs with channel lengths below 0.25 µm. These devices have been fabricated using a modified NMOS process. All patterns have been defined by direct-beam writing using both positive and negative electron resists. The gate oxide thickness of 80Å together with properly adjusted ion implantation steps yields device thresholds of 0.5 V. All heat treatments have been kept as short as possible to ensure very shallow source-drain junctions. All contact structures are scaled to 1 × 1 µm window features. Finished devices show excellent performance. Long-channel-like behavior is preserved for supply voltages below 2.5 V. The subthreshold slope is 88 mV/decade. Current drive capabilities are the highest ever reported for silicon MOSFETs. The devices exhibit outstanding transconductance values between 270 and 300 mS/mm.

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