2002 · 15 citations · 4 references
EngineeringMaterials EngineeringMaterials ScienceElectronic MaterialsSemiconductor DevicesSemiconductor MaterialsDevice ReliabilityMetal-semiconductor ContactsSemiconductor Device MaterialsSemiconductor InterfacesSemiconductor ReliabilitySemiconductor SurfacesCapacitanceCapacitance-voltage CharacteristicsCopper MetallizationCrystalline SiliconElectroless DepositionMetallizationSilicon DioxideSingle-crystal Silicon
The reliability of copper metallization on silicon-dioxide over single crystalline silicon was studied by capacitance techniques, secondary-ion-mass spectroscopy analysis and Rutherford back scattering. The metallization was either evaporated copper or electroless copper deposited in an alkali-free process. The barrier role of a titanium adhesion layer between the copper and the oxide has also been studied. Bias-thermal stress (BTS) studies of MOS structures were conducted at 150 degrees C, 250 degrees C, 275 degrees C and 300 degrees C. The biased samples were stressed at electric field of 1 MV/cm for a time ranging between 10 minutes for the higher temperatures up to 168 hours at the lower temperatures. The high-frequency capacitance versus voltage (CV) characteristics of the MOS devices change drastically when the copper reaches the Si/SiO/sub 2/ interface. The penetration time of copper through the oxide was characterized as a function of the temperature and was found to increase exponentially with temperature with an activation energy of about 0.85+or-0.2 eV. Without bias only a small amount of copper penetrates the oxide.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
4
Deep impurities in semiconductors
J. Llacer · Journal of Crystal Growth · 1974 · 785 citations
Properties of Silicon Doped with Iron or Copper
C. B. Collins, R. O. Carlson · Physical Review · 1957 · 215 citations
Copper impurity levels in silicon
Naotake Tōyama · Solid-State Electronics · 1983 · 31 citations