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A 120V 180nm High Voltage CMOS smart power technology for system-on-chip integration

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2010

Year

Abstract

Power management and sensor driver integrated circuits need technologies with high breakdown voltage (BVdss), low on-resistance (Rsp) and preferably low process complexity and improved integration. A new 180nm High Voltage CMOS (HVCMOS) technology is described which includes LDMOS devices with 160V BVdss and an N-LDMOS device with minimum Rsp of 14.4mOhm·mm2 for 34V BVdss as part of a suite of LDMOS devices with 30–160V BVds. Ten year SOA lifetime and 8KV HBM ESD capability are documented to provide a HVCMOS technology which addresses the widest reported range of use voltage applications (5–120V) for 180nm and can be used for designs which require a merging of wireless and power management.