A Single-40 Gb/s Dual-20 Gb/s Serializer IC With SFI-5.2 Interface in 65 nm CMOS

Abstract

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> This paper presents a 40 Gb/s Serializer IC in 65 nm bulk CMOS technology. The IC has an SFI5.2-compliant 10 Gb/s input interface and supports two different output modes, single 40<formula formulatype="inline"><tex Notation="TeX">$~$</tex> </formula>Gb/s for OC-768 VSR and dual 20 Gb/s for DQPSK. The IC is evaluated on a PCB and error-free operation is confirmed. The chip consumes 1.8 W for the 40 G mode, and 1.6 W for the 20 G mode from 1.2 V and 3.3 V power supplies. </para>