Masaya Kibune

Split capacitor DAC mismatch calibration in successive approximation ADC

Yanfei Chen, Xiaolei Zhu, Hirotaka Tamura et al. · 2009 · 151 citations

Calibration, Data Converter, Analog Design +7

22.2 A 25Gb/s hybrid integrated silicon photonic transceiver in 28nm CMOS and SOI

Yanfei Chen, Masaya Kibune, Asako Toda et al. · 2015 · 68 citations

Photonics, Electrical Engineering, Optical Interconnects +15

A CMOS multichannel 10-Gb/s transceiver

H. Takauchi, Hirotaka Tamura, Satoshi Matsubara et al. · IEEE Journal of Solid-State Circuits · 2003 · 63 citations

Cmos Multichannel 10-Gb/s, Engineering, Vlsi Design +11

A 10-Gb/s receiver with series equalizer and on-chip ISI monitor in 0.11-/spl mu/m CMOS

Y. Tomita, Masaya Kibune, J. Ogawa et al. · IEEE Journal of Solid-State Circuits · 2005 · 58 citations

Low-power Electronics, Engineering, Receiver Active Area +10

A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique

Y. Okaniwa, Hirotaka Tamura, Masaya Kibune et al. · IEEE Journal of Solid-State Circuits · 2005 · 56 citations

Clocked Amplifier, Engineering, Clock Recovery +10