Y. Okaniwa

A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique

Y. Okaniwa, Hirotaka Tamura, Masaya Kibune et al. · IEEE Journal of Solid-State Circuits · 2005 · 56 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 40–44 Gb/s 3$\times$ Oversampling CMOS CDR/1:16 DEMUX

Nikola Nedovic, N. Tzartzanis, Hirotaka Tamura et al. · IEEE Journal of Solid-State Circuits · 2007 · 20 citations

Engineering, Computer Engineering, Electrical Engineering +16

A 40-to-44Gb/s 3× Oversampling CMOS CDR/1:16 DEMUX

Nikola Nedovic, N. Tzartzanis, Hirotaka Tamura et al. · 2007 · 19 citations

Engineering, Computer Engineering, Electrical Engineering +10

A 0.11 μm CMOS clocked comparator for high-speed serial communications

Y. Okaniwa, Hirotaka Tamura, Masaya Kibune et al. · 2004 · 11 citations

Engineering, Electrical Engineering, Analog Electronics +16