Digital Annealer for High-Speed Solving of Combinatorial optimization Problems and Its Applications

Satoshi Matsubara, Motomu Takatsu, Toshiyuki Miyazawa, +4

Mathematical ProgrammingCluster ComputingCombinatorial Optimization ProblemsEngineeringAdvanced Computing +21

3.5 A 56Gb/s NRZ-electrical 247mW/lane serial-link transceiver in 28nm CMOS

Takayuki Shibasaki, Takumi Danjo, Yuuki Ogata, +14

System On ChipElectrical EngineeringComplete TransceiverPhase DetectorsEngineering +8

A 22.5-to-32-Gb/s 3.2-pJ/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOS

Wahid Rahman, Danny Yoo, Joshua Liang, +4

IEEE Journal of Solid-State Circuits

EngineeringReferenceless CdrFrequency CorrectionData ConverterClock Recovery +7

A 60-GHz 1.65mW 25.9% locking range multi-order LC oscillator based injection locked frequency divider in 65nm CMOS

Keita Takatsu, Hirotaka Tamura, Takuji Yamamoto, +4

Core Ilfd AreaEngineeringRadio FrequencyHigh-frequency DeviceMixed-signal Integrated Circuit +7

A 56-Gb/s receiver front-end with a CTLE and 1-tap DFE in 20-nm CMOS

Takayuki Shibasaki, Win Chaivipas, Yanfei Chen, +6

Low-power ElectronicsElectrical EngineeringEngineeringClock RecoveryData Converter +13

20-GHz Quadrature Injection-Locked <i>LC</i> Dividers With Enhanced Locking Range

Takayuki Shibasaki, Hirotaka Tamura, Kouichi Kanda, +3

IEEE Journal of Solid-State Circuits

Millimeter Wave TechnologyTransconductance CouplingMiller TopologyHigh-frequency DeviceMixed-signal Integrated Circuit +3

A Single-40 Gb/s Dual-20 Gb/s Serializer IC With SFI-5.2 Interface in 65 nm CMOS

Kouichi Kanda, Hirotaka Tamura, Takuji Yamamoto, +15

IEEE Journal of Solid-State Circuits

System On ChipElectrical EngineeringSfi-5.2 InterfaceVlsi DesignEngineering +12

6.8 A 36Gb/s Adaptive Baud-Rate CDR with CTLE and 1-Tap DFE in 28nm CMOS

Danny Yoo, Mohammad Bagherbeik, Wahid Rahman, +3

Hardware SecurityAdaptive EngineEngineeringVlsi DesignClock Recovery +13

A 3 Watt 39.8–44.6 Gb/s Dual-Mode SFI5.2 SerDes Chip Set in 65 nm CMOS

Nikola Nedovic, Anders Kristensson, Samir Parikh, +20

IEEE Journal of Solid-State Circuits

Low-power ElectronicsPhotonicsElectrical Engineering×21.5-22.3 Gb/s DqpskEngineering +12

6.6 A 22.5-to-32Gb/s 3.2pJ/b referenceless baud-rate digital CDR with DFE and CTLE in 28nm CMOS

Wahid Rahman, Danny Yoo, Joshua Liang, +4

Hardware SecurityEngineeringVlsi DesignBaud-rate ClockClock Recovery +10