Yoshiyasu Doi

A Zero-IF 60 GHz 65 nm CMOS Transceiver With Direct BPSK Modulation Demonstrating up to 6 Gb/s Data Rates Over a 2 m Wireless Link

Alexander Tomkins, Ricardo Aroca, Takuji Yamamoto et al. · IEEE Journal of Solid-State Circuits · 2009 · 156 citations

Low-power Electronics, Power Consumption, Electrical Engineering +15

A CMOS multichannel 10-Gb/s transceiver

H. Takauchi, Hirotaka Tamura, Satoshi Matsubara et al. · IEEE Journal of Solid-State Circuits · 2003 · 63 citations

Cmos Multichannel 10-Gb/s, Engineering, Vlsi Design +11

A 60-GHz 1.65mW 25.9% locking range multi-order LC oscillator based injection locked frequency divider in 65nm CMOS

Keita Takatsu, Hirotaka Tamura, Takuji Yamamoto et al. · 2010 · 39 citations

Core Ilfd Area, Engineering, Radio Frequency +9

A 56-Gb/s receiver front-end with a CTLE and 1-tap DFE in 20-nm CMOS

Takayuki Shibasaki, Win Chaivipas, Yanfei Chen et al. · 2014 · 33 citations

Low-power Electronics, Electrical Engineering, Engineering +15

A 5Gb/s transceiver with an ADC-based feedforward CDR and CMA adaptive equalizer in 65nm CMOS

Hisakatsu Yamaguchi, Hirotaka Tamura, Yoshiyasu Doi et al. · 2010 · 28 citations

Input Signal, Adc-based Feedforward Cdr, Data Converter +9