Statistics
Publications
8
Citations
634
H-Index
8
Active since
2006
Affiliations
Win Chaivipas is an author at Tokyo Institute of Technology specializing in engineering, signal processing, and antenna.
Publications per year
2006–2014
8
8
A 56-Gb/s receiver front-end with a CTLE and 1-tap DFE in 20-nm CMOS
Takayuki Shibasaki, Win Chaivipas, Yanfei Chen et al. · 2014 · 33 citations
Low-power Electronics, Electrical Engineering, Engineering +15
32Gb/s data-interpolator receiver with 2-tap DFE in 28nm CMOS
Yoshiyuki Doi, Takayuki Shibasaki, Takumi Danjo et al. · 2013 · 17 citations
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