The new program/erase cycling degradation mechanism of NAND flash memory devices

Abstract

NAND memory cells scaled to 51–32 nm, when they receive stress due to program and erase cycles, not only reveal a gradual positive shift of a midgap voltage in a program state along the number of program and erase cycles but also possess inverse relationship between degradation of subthreshold swing values due to the cycling stress and their initial swing values. These properties were absent in the memory cells larger than 70 nm. A new reliability model is proposed based on non-uniform distribution of negative oxide charges which are generated much more near to floating gate edges than to the center due to the cycling stress. It is shown that the non-uniformly distributed charges hinder erase currents while leave program currents intact, leading to the positive midgap voltage shift in a program state. The dense oxide charges near the gate edges significantly influence source/drain junction potential, resulting in observed degradation of subthreshold swing values.