Publication | Closed Access
Low-k interconnect stack with metal-insulator-metal capacitors for 22nm high volume manufacturing
49
Citations
2
References
2012
Year
Unknown Venue
EngineeringVlsi DesignComputer ArchitectureMetal-insulator-metal CapacitorsInterconnect (Integrated Circuits)Wafer Scale ProcessingAdvanced Packaging (Semiconductors)NanoelectronicsElectronic PackagingMaterials Science3D Ic ArchitectureElectrical EngineeringChip On BoardComputer EngineeringPitch LayersMicroelectronicsHigh Volume Manufacturing3D PrintingHigh-performance Logic TechnologyMicrofabricationApplied PhysicsLow-k Interconnect Stack
We describe interconnect features for Intel's 22nm high-performance logic technology, with metal-insulator-metal capacitors and nine layers of interconnects. Metal-1 through Metal-6 feature a new ultra-low-k carbon doped oxide (CDO) and a low-k etch stop. Metal-7 and Metal-8 use a low-k CDO. New materials and process optimization provide 13-18% capacitance improvement. Single-exposure patterning for 80nm pitch layers makes the process cost-effective.
| Year | Citations | |
|---|---|---|
Page 1
Page 1