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High-mobility strained-Si PMOSFET's
130
Citations
14
References
1996
Year
Materials EngineeringElectrical EngineeringEngineeringSige Buffer LayerHigh-mobility Strained-si PmosfetNanoelectronicsBias Temperature InstabilityApplied PhysicsChannel MobilityBulk Si DeviceSemiconductor Device FabricationSilicon On InsulatorMicroelectronicsSemiconductor Device
Operation and fabrication of a new high channel mobility strained-Si PMOSFET are presented. The growth of high-quality strained Si layer on completely relaxed, step-graded, SiGe buffer layer is demonstrated by gas source MBE. The strained-Si layer is characterized by double crystal X-ray diffraction, photoluminescence, and transmission electron microscopy. The operation of a PMOSFET is shown by device simulation and experiment. The high-mobility strained-Si PMOSFET is fabricated on strained-Si, which is grown epitaxially on a completely relaxed step-graded Si/sub 0.82/Ge/sub 0.18/ buffer layer on Si(100) substrate. At high vertical fields (high |V/sub g/|), the channel mobility of the strained-Si device is found to be 40% and 200% higher at 300 K and 77 K, respectively, compared to those of the bulk Si device. In the case of the strained-Si device, degradation of channel mobility due to Si/SiO/sub 2/ interface scattering is found to be more pronounced compared to that of the bulk Si device. Carrier confinement at the type-II strained-Si/SiGe-buffer interface is clearly demonstrated from device transconductance and C-V measurements at 300 K and 77 K.
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