2007 · 31 citations · 5 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureFault ToleranceFault-tolerant ComputingFault Tolerance DesignNetwork ArchitectureNetwork-on-chip DesignReliable System DesignRoutingRouting ArchitectureArea Overhead AnalysisFault Tolerance AnalysisFault Tolerance EvaluationFault Tolerance MechanismsFault-tolerant ArchitectureFault-tolerant Network DesignFault-tolerant NetworksNetwork Interface Design
The paper presents an approach for analyzing and improving fault tolerance aspects in NoC architectures. This is a necessary step to be taken in order to implement reliable systems in future nanoscale technologies. Several NoC architectures and the router structures as well as the network interface needed for them are presented and compared for their fault tolerance, area and performance. The results indicate that a network structure built from simple 3-port routers provides better fault tolerance than a structure based on more complex multiport routers, and that the area overhead can be kept moderate
5
William J. Dally, Brian Towles · 2001 · 3.2K citations
Engineering, Computer Engineering, Electrical Engineering +17
A network on chip architecture and design methodology
Shashi Kumar, Axel Jantsch, Juha-Pekka Soininen et al. · 2003 · 1.2K citations
Trends and challenges in VLSI circuit reliability
Cris S. Constantinescu · IEEE Micro · 2003 · 616 citations
Engineering, Computer Engineering, Electrical Engineering +17