IEEE Transactions on Applied Superconductivity · 1994 · 74 citations · 10 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignConfigurable Logic BlocksQuantum CircuitsFlip-flop ArchitectureFlip-flop DesignFlip-flopsHigh-voltage Power SupplyInitial State EffectsLogic Function ImplementationMargins
We are introducing a new subfamily of rapid single-flux-quantum (RSFQ) digital cells, based on a single B flip-flop template. The template can be considered as an SFQ flip-flop with up to 4 inputs and 6 outputs. Each input SFQ pulse can change the flip-flop's internal state. Each output presents (in the form of SFQ pulses a specific logic function of the initial state of the cell and input signals. Simple connection of various inputs and/or outputs, combined with shortening or opening of certain branches of the template allows one to implement a variety of RSFQ cells with wide margins. Of these various RSFQ cells, we have designed and successfully tested the T1 cell (asynchronous toggle flip-flop with synchronous destructive readout), single-bit full adder, and single-bit stage of an up-down counter. Experimentally measured margins for dc power supply voltage for these circuits were /spl plusmn/24%, /spl plusmn/24%, and /spl plusmn/17%, respectively.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Finite-State Models for Logical Machines
Students Quarterly Journal · 1969 · 244 citations
New RSFQ circuits (Josephson junction digital devices)
S. Polonsky, P. Bunyk, A.F. Kirichenko et al. · IEEE Transactions on Applied Superconductivity · 1993 · 131 citations