Design, Automation, and Test in Europe · 2009 · 17 citations · 5 references
EngineeringComputer ArchitectureProcessor ArchitectureHardware SecurityReliability EngineeringHigh-performance ArchitectureAdaptive Idleness DistributionSystems EngineeringMultiprocessor SimulatorParallel ComputingManycore ProcessorPower-aware DesignDeep Submicron DesignsPower-aware ComputingHardware ReliabilityComputer EngineeringComputer ScienceSystem On ChipMany-core ArchitectureMultiprocessor SystemParallel ProgrammingCircuit ReliabilityCore Lifetimes
In deep submicron designs of Multiprocessor Systems-on-Chip (MPSoC) architectures, uncompensated within-die process variations and aging effects will lead to an increasing uncertainty and unbalancing of expected core lifetimes. In this paper we present an adaptive workload allocation strategy for run-time compensation of variations- and aging-induced unbalanced core lifetimes by means of core activity duty cycling. The proposed techniques regulates the percentage of idle time on short-expected-life cores to meet the platform lifetime target with minimum performance degradation.Experiments have been conducted on a multiprocessor simulator of a next-generation industrial MPSoC platform for multimedia applications made of a general purpose processor and programmable accelerators.
5
Detecting Emerging Wearout Faults
Jared C. Smolens, Brian T. Gold, Juanita Hoe et al. · 2007 · 68 citations
A Route-Oriented Sleep Approach in Wireless Sensor Network
Honggang Wang, Wei Wang, Dongming Peng et al. · 2006 · 13 citations