Programmable Accelerators
Programmable Accelerators is a class of hardware architectures that belong to the broader category of accelerator architectures, distinguished by their support for reconfigurable or software-defined functionality, enabling the execution of diverse workloads through programmable instruction sets or configurable data paths.
173
Publications
6.7K
Citations
741
Authors
202
Institutions
Publications per year
2017–2026
73
Parents
173
From high-level deep neural models to FPGAs
Hardik Sharma, Jongse Park, Divya Mahajan et al. · 2016 · 365 citations
Xilinx Adaptive Compute Acceleration Platform
Brian Gaide, Dinesh Gaitonde, Chirag Ravishankar et al. · 2019 · 146 citations
DSAGEN: Synthesizing Programmable Spatial Accelerators
Jian Weng, Sihao Liu, Vidushi Dadu et al. · 2020 · 134 citations
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University of Bologna
Bologna, Italy
9 h-index
23 publications
489 citations
Intel (United States)
Santa Clara, United States
8 h-index
35 publications
1.1K citations
University of California, Los Angeles
Los Angeles, United States
7 h-index
25 publications
1.5K citations
Georgia Institute of Technology
Atlanta, United States
7 h-index
24 publications
3.3K citations
University of Michigan
Ann Arbor, United States
6 h-index
19 publications
1.6K citations
University of California San Diego
San Diego, United States
5 h-index
14 publications
1.1K citations
University of California, Berkeley
Berkeley, United States
4 h-index
31 publications
733 citations
École Polytechnique Fédérale de Lausanne
Lausanne, Switzerland
4 h-index
9 publications
205 citations
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8 publications · 230 citations
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Repository · 4 publications · 65 citations
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4 publications · 197 citations
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TPDS · 3 publications · 73 citations
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TECS · 3 publications · 101 citations
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