Characterization and management of wafer stress for various pattern densities in 3D integration technology

Abstract

In the current 3D integration technology, the control of wafer warp is needed to ensure uniform photolithography, good bonding areas and other major processes that requires flat wafer surface. In this paper, we found out that the wafer warpage was increased with increasing TSV density. The highest wafer warpage was observed after Cu annealing base on step by step warpage monitor. Wafer warpage reduction is achieved by process stage modification.