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Thin oxide thickness extrapolation from capacitance-voltage measurements
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Citations
22
References
1997
Year
Device ModelingElectrical EngineeringEngineeringPhysicsNanoelectronicsPolycrystalline Silicon GateOxide ElectronicsApplied PhysicsThickness ExtrapolationBias Temperature InstabilityFermi-dirac StatisticsOxide-thickness Extrapolation AlgorithmsMicroelectronicsBeyond CmosThin Film ProcessingSemiconductor Device
Five oxide-thickness extrapolation algorithms, all based on the same model (metal gate, negligible interface traps, no quantum effects), are compared to determine their accuracy. Three sets of parameters are used: (acceptor impurity concentration, oxide thickness, and temperature): (10/sup 16/ cm/sup -3/, 250 /spl Aring/, 300 K), (5/spl times/10/sup 17/ Cm/sup -3/, 250 /spl Aring/, 300 K), and (5/spl times/10/sup 17/ cm/sup -3/, 50 /spl Aring/, 150 K). Demonstration examples show that a new extrapolation method, which includes Fermi-Dirac statistics, gives the most accurate results, while the widely-used C/sub o//spl sime/C/sub g/ (measured at the power supply voltage) is the least accurate. The effect of polycrystalline silicon gate is also illustrated.
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