A 2Tb/s 6×4 mesh network with DVFS and 2.3Tb/s/W router in 45nm CMOS

Praveen Salihundam, Shailendra Jain, Tiju Jacob, Shasi Kumar, Vasantha Erraguntla, Yatin Hoskote, Sriram Vangal, Gregory Ruhl, Partha Kundu, Nitin Borkar

2010 · 21 citations · 4 references

Concepts

Abstract

A packet-switched 6×4 2D mesh network-on-chip (NoC) on a dedicated voltage and frequency island (VFI) provides 2 Tb/s of bisection bandwidth, and interconnects 48 Pentium <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">™</sup> class IA-32 cores and 4 DDR3 channels. The 1.28 Tb/s router with 16 B, 5.4 mm links achieves high network utilization through 8 virtual channels (VC), early-buffer write and read, route pre-computation and a 1-cycle wrapped wavefront allocator (WWFA) design. The 640 K transistor, 1.17 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> router operates at 2 GHz at 1.1 V while dissipating 550 mW. Router energy efficiency scales up to 7.2 Tb/s/W.

References

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