Analog Test Bus Infrastructure for RF/AMS Modules in Core-Based Design

Abstract

This article describes an analog test bus infrastructure as a straightforward approach to grant the accessibility to embedded RF or Analog modules in core-based design. This DfT method increases the testability and provides debug/diagnosis facilities. The standardized analog test bus architecture is suited for an automated test development flow. In addition, the entire infrastructure is to a large extent reusable, through its design independence. This industrially innovative and practical approach has been applied to several products within our company, and two RF chips are chosen to illustrate its benefits.