NBTI degradation: From transistor to SRAM arrays

Abstract

A novel composite model had been recently introduced to physically explain the mean pMOS threshold voltage shift (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TP</sub> ) induced by NBTI degradation at transistor level in a quantitative way. This model is here extended to include the statistical variations introduced by intrinsic fluctuations. In a second time, the model is extrapolated up to SRAM arrays by analyzing the SRAM bitcell sensitivity to transistor degradation. This approach allows quantitative prediction of NBTI-induced V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MIN</sub> variations and access time T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">aa</sub> degradation during burn-in operations. The key findings include (a) demonstration of non-normality of V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TP</sub> shift distribution (b) NBTI contribution to product V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MIN</sub> drift arises from both mean V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TP</sub> drift but also from increased V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TP</sub> dispersion, and (c) V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TP</sub> shift non-normality is smoothed out at product level by time-zero variation of the six transistors of the SRAM bitcell.