Publication | Closed Access
1/f noise in n- and p-channel MOS devices through irradiation and annealing
78
Citations
21
References
1991
Year
Pmos TransistorsSemiconductor TechnologyElectrical EngineeringEngineeringNegative Bias AnnealsPhysicsRf SemiconductorNanoelectronicsBias Temperature InstabilityApplied PhysicsIntegrated CircuitsBiased AnnealsMicroelectronicsOptoelectronicsSemiconductor DeviceP-channel Mos Devices
The 1/f noise of n- and p-channel MOS transistors was investigated through irradiation and biased anneals. While the increase in noise during irradiation is similar for both types of devices, the noise differs significantly in response to biased anneals. In particular, the noise decreases with decreasing Delta V/sub ot/ during positive-bias anneals in nMOS transistors but increases during positive-bias anneals for pMOS transistors. Conversely, negative bias anneals increase the noise in nMOS devices but decrease the noise in pMOS devices. These results are explained in terms of majority carrier trapping and detrapping at oxide defects near the Si/SiO/sub 2/ interface. Under normal operating bias conditions (positive bias for nMOS and negative bias for pMOS), the 1/f noise of both n- and p-channel transistors decreases through postirradiation annealing.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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