2005 · 24 citations · 5 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsCmos Circuit DesignLow-noise Circuit DesignMixed-signal Integrated Circuit DesignNoiseRadio-frequency Integrated CircuitsUltra-wideband CommunicationLna SynthesisLow-noise AmplifiersLow-power Cmos DesignNoise FigureNoise Figure OptimizationPower EfficiencyPower Efficiency OptimizationPower Gain
In this paper, we introduce a systematic method to design CMOS low noise amplifiers (LNA) for ultrawideband (UWB) applications. The proposed method is addressed to optimize noise performance and power efficiency while maintaining good input and output matching. The synthesized LNA achieves up to 14 dB power gain with a low noise figure (NF) of 2 dB and provides a reasonably acceptable input and output matching of -10 dB across the frequency range of 3/spl sim/5 GHz. The developed LNA, implemented in TSMC 0.18 /spl mu/m CMOS technology, is a single-stage architecture with very low power dissipation of 9 mW with a 0.9 V supply.
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A 0.6-22-GHz broadband CMOS distributed amplifier
Ren-Chieh Liu, Kuo-Liang Deng, Huei Wang · 2003 · 150 citations
A 3 to 10 GHz LNA using a wideband LC-ladder matching network
A.A. Abidi · 2004 · 132 citations